1. Field of the Invention
The invention relates to a phase detection circuit for stepwise measurement of a phase relation between two clock signals, comprising a delay circuit controllable by a first one of the two clock signals, said circuit having a plurality of tappings each being coupled to an input of a different one of a plurality of memory elements, a clock signal input of each of the memory elements is controllable by the second one of the two clock signals and an output of each of the memory elements is coupled to a logic circuit for determining the phase relation to be measured, while a measuring circuit for determining the period of the first clock signal is coupled to a plurality of outputs of the delay circuit.
2. Description of Related Art
A phase detection circuit of the type described above is known from IEEE Transactions on Consumer Electronics, Aug. 1987, pages 188, 189 in which the measuring circuit comprises a plurality of further memory elements each being connected to an output of the delay circuit and whose clock signal inputs receive the first clock signal. To be able to measure the period of the first clock signal with sufficient accuracy, a large number of these further memories is required. The outputs of the further memory elements are also connected to the logic circuit with which the ratio of the time interval between an edge of the first clock signal and of the second clock signal with respect to the period of the first clock signal is determined. To be able to do this unambiguously and accurately, a logic circuit having a large number of circuit elements is required.